The Development of Gate-All-Around FET (GAA FET) Technology as a Successor to FinFET: Architecture, Fabrication Challenges, and Future Opportunities

Abstract

As conventional FinFET architecture approaches its physical scaling limits below the 3nm node due to severe short-channel effects, subthreshold leakage, and degraded gate control, Gate-All-Around Field-Effect Transistor (GAA FET) technology has emerged as the definitive successor for next-generation semiconductor fabrication. This review paper provides a comprehensive analysis of GAA FET technology, focusing on its structural evolution from planar and FinFET architectures to 360-degree electrostatic control systems, including nanowire, nanosheet (MBCFET), and forksheet variants. Through a systematic literature review and comparative performance analysis, this study examines the operational advantages of GAA FETs, such as significant drive current (I_on) enhancement, superior power efficiency, and design flexibility via continuous sheet width scaling. Furthermore, the critical manufacturing hurdles hindering high-yield industrial integration are thoroughly dissected, including precise Si/SiGe superlattice epitaxy, highly selective isotropic etching, inner spacer formation, and self-heating effects (SHE). Finally, this paper outlines the future outlook of transistor scaling, highlighting the transition toward Complementary FET (CFET) architectures. Ultimately, this review underscores that GAA FET is no longer a mere laboratory concept but the fundamental cornerstone enabling the continuation of Moore's Law and the advancement of High-Performance Computing (HPC) in the artificial intelligence era.